Wafer-level underfill has the potential to substantially increase the implementation and usage of flip chip technology in the electronics industry, bringing the financial benefits of wafer-level processing to flip chip assembly and packaging.

Download our white paper to learn more about wafer-level flip chip assembly processing quality, including:

• a parametric study of the effect of underfill coating uniformity on assembly quality and underfill voiding
• method exploration for reducing die misalignment through the use of fillet-constraining solder mask patterns
• presentation of a theoretical description of the forces acting on a wafer-level flip chip die to better understand the influence of process and design parameters on assembly yield